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 FSAM20SM60A
FSAM20SM60A
SPMTM (Smart Power Module)
General Description
FSAM20SM60A is an advanced smart power module (SPM) that Fairchild has newly developed and designed to provide very compact and high performance ac motor drives mainly targeting medium speed low-power inverterdriven application like air conditioners. It combines optimized circuit protection and drive matched to low-loss IGBTs. Highly effective short-circuit current detection/ protection is realized through the use of advanced current sensing IGBT chips that allow continuous monitoring of the IGBTs current. System reliability is further enhanced by the built-in over-temperature monitoring and integrated undervoltage lock-out protection. The high speed built-in HVIC provides opto-coupler-less IGBT gate driving capability that further reduce the overall size of the inverter system design. In addition the incorporated HVIC facilitates the use of single-supply drive topology enabling the FSAM20SM60A to be driven by only one drive supply voltage without negative bias. Inverter current sensing application can be achieved due to the divided negative dc terminals.
Features
* UL Certified No. E209204 * 600V-20A 3-phase IGBT inverter bridge including control ICs for gate driving and protection * Divided negative dc-link terminals for inverter current sensing applications * Single-grounded power supply due to built-in HVIC * Typical switching frequency of 5kHz * Built-in thermistor for over-temperature monitoring * Inverter power rating of 1.5kW / 100~253 Vac * Isolation rating of 2500Vrms/min. * Very low leakage current due to using ceramic substrate * Adjustable current protection level by varying series resistor value with sense-IGBTs
Applications
* AC 100V ~ 253V 3-phase inverter drive for small power (1.5kW) ac motor drives * Home appliances applications requiring medium switching frequency operation like air conditioners drive system * Application ratings: - Power : 1.5kW / 100~253 Vac - Switching frequency : Typical 5kHz (PWM Control) - 100% load current : 8A (Irms) - 150% load current : 12A (Irms) for 1 minute
External View
Top View Bottom View
60mm
31mm
Fig. 1.
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
Integrated Power Functions
* 600V-20A IGBT inverter for 3-phase DC/AC power conversion (Please refer to Fig. 3)
Integrated Drive, Protection and System Control Functions
* For inverter high-side IGBTs: Gate drive circuit, High voltage isolated high-speed level shifting Control circuit under-voltage (UV) protection Note) Available bootstrap circuit example is given in Figs. 14and 15. * For inverter low-side IGBTs: Gate drive circuit, Short-Circuit (SC) protection Control supply circuit under-voltage (UV) protection * Temperature Monitoring: System over-temperature monitoring using built-in thermistor Note) Available temperature monitoring circuit is given in Fig. 15. * Fault signaling: Corresponding to a SC fault (Low-side IGBTs) or a UV fault (Low-side control supply circuit) * Input interface: 5V CMOS/LSTTL compatible, Schmitt trigger input
Pin Configuration
Top View
(1) VCC(L) (2) com(L) (3) IN(UL) (4) IN(VL) (5) IN(WL) (6) com(L) (7) FO (8) CFOD (9) CSC (10) RSC (11) IN(UH) (12) VCC(UH) (13) VB(U) (14) VS(U) (15) IN(VH) (16) com(H) (17) VCC(VH) (18) VB(V) (19) VS(V) (20) IN(WH) (21) VCC(WH) (22) VB(W) (23) VS(W)
(24) VTH (25) RTH (26) NU (27) NV (28) NW
(29) U
Case Temperature (TC) Detecting Point
(30) V
(31) W Ceramic Substrate (32) P
Fig. 2.
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
Pin Descriptions
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 Pin Name VCC(L) COM(L) IN(UL) IN(VL) IN(WL) COM(L) VFO CFOD CSC RSC IN(UH) VCC(UH) VB(U) VS(U) IN(VH) COM(H) VCC(VH) VB(V) VS(V) IN(WH) VCC(WH) VB(W) VS(W) VTH RTH NU NV NW U V W P Pin Description Low-side Common Bias Voltage for IC and IGBTs Driving Low-side Common Supply Ground Signal Input for Low-side U Phase Signal Input for Low-side V Phase Signal Input for Low-side W Phase Low-side Common Supply Ground Fault Output Capacitor for Fault Output Duration Time Selection Capacitor (Low-pass Filter) for Short-Circuit Current Detection Input Resistor for Short-Circuit Current Detection Signal Input for High-side U Phase High-side Bias Voltage for U Phase IC High-side Bias Voltage for U Phase IGBT Driving High-side Bias Voltage Ground for U Phase IGBT Driving Signal Input for High-side V Phase High-side Common Supply Ground High-side Bias Voltage for V Phase IC High-side Bias Voltage for V Phase IGBT Driving High-side Bias Voltage Ground for V Phase IGBT Driving Signal Input for High-side W Phase High-side Bias Voltage for W Phase IC High-side Bias Voltage for W Phase IGBT Driving High-side Bias Voltage Ground for W Phase IGBT Driving Thermistor Bias Voltage Series Resistor for the Use of Thermistor (Temperature Detection) Negative DC-Link Input for U Phase Negative DC-Link Input for V Phase Negative DC-Link Input for W Phase Output for U Phase Output for V Phase Output for W Phase Positive DC-Link Input
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
Internal Equivalent Circuit and Input/Output Pins
Bottom View
(22) V B(W ) (21) V C C(W H ) (20) IN (W H ) (23) V S(W ) (18) V B(V ) (17) V C C(VH ) (16) C O M (H ) (15) IN (VH ) (19) V S(V ) (13) V B(U ) (12) V C C(UH ) (11) IN (U H ) (14) V S(U ) (10) R SC (9) C SC (8) C FO D (7) V FO (6) C O M (L) (5) IN (W L) (4) IN (VL) (3) IN (U L) (2) C O M (L) (1) V C C(L)
VB VC C COM IN OUT VS
(32) P
(31) W
VB VC C COM IN OUT VS (30) V
VB VC C COM IN VS (29) U OUT
C (S C ) C (F O D ) VF O
O U T (W L) (28) N W
IN (W L) IN (V L) IN (U L) C O M (L) VC C (26) N U
THE RM ISTO R
O U T (V L) (27) N V
O U T (U L)
(25) R T H (24) V T H
Note: 1) Inverter low-side is composed of three sense-IGBTs including freewheeling diodes for each IGBT and one control IC which has gate driving, current sensing and protection functions. 2) Inverter power side is composed of four inverter dc-link input pins and three inverter output pins. 3) Inverter high-side is composed of three normal-IGBTs including freewheeling diodes and three drive ICs for each IGBT.
Fig. 3.
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
Absolute Maximum Ratings
Inverter Part
Item Supply Voltage Supply Voltage (Surge) Collector-Emitter Voltage Each IGBT Collector Current Each IGBT Collector Current Each IGBT Collector Current (Peak) Collector Dissipation Operating Junction Temperature
(TJ = 25C, Unless Otherwise Specified)
Symbol VPN VPN(Surge) VCES IC IC ICP PC TJ
Condition Applied between P- NU, NV, NW Applied between P- NU, NV, NW TC = 25C TC = 100C TC = 25C, Instantaneous Value (Pulse) TC = 25C per One Chip (Note 1)
Rating 450 500 600 20 15 40 59 -20 ~ 125
Unit V V V A A A W C
Note: 1. It would be recommended that the average junction temperature should be limited to TJ 125C (@TC 100C) in order to guarantee safe operation.
Control Part
Item Control Supply Voltage High-side Control Bias Voltage Input Signal Voltage Fault Output Supply Voltage Fault Output Current Current Sensing Input Voltage Symbol Condition VCC Applied between VCC(UH), VCC(VH), VCC(WH) - COM(H), VCC(L) - COM(L) VBS VIN VFO IFO VSC Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) VS(W) Applied between IN(UH), IN(VH), IN(WH) - COM(H) IN(UL), IN(VL), IN(WL) - COM(L) Applied between VFO - COM(L) Sink Current at VFO Pin Applied between CSC - COM(L) Rating 20 20 -0.3 ~ VCC+0.3 -0.3 ~ VCC+0.3 5 -0.3 ~ VCC+0.3 Unit V V V V mA V
Total System
Item Self Protection Supply Voltage Limit (Short-Circuit Protection Capability) Module Case Operation Temperature Storage Temperature Isolation Voltage Symbol Condition VPN(PROT) VCC = VBS = 13.5 ~ 16.5V TJ = 25C, Non-repetitive, less than 6s TC TSTG VISO 60Hz, Sinusoidal, AC 1 minute, Connection Pins to Heat-sink Plate Note Fig.2 Rating 400 -20 ~ 100 -20 ~ 125 2500 Unit V C C Vrms
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
Absolute Maximum Ratings Thermal Resistance
Item Junction to Case Thermal Resistance Symbol Condition Rth(j-c)Q Each IGBT under Inverter Operating Condition Rth(j-c)F Contact Thermal Resistance Rth(c-f) Each FWDi under Inverter Operating Condition Ceramic Substrate (per 1 Module) Thermal Grease Applied (Note 3) Min. Typ. Max. 2.1 3.3 0.06 Unit C/W C/W C/W
Note: 2. For the measurement point of case temperature(TC), please refer to Fig. 2. 3. The thickness of thermal grease should not be more than 100um.
Electrical Characteristics Inverter Part
Item Collector - Emitter Saturation Voltage FWDi Forward Voltage Switching Times Symbol VCE(SAT) VCC = VBS = 15V VIN = 0V VFM tON tC(ON) tOFF tC(OFF) trr Collector - Emitter Leakage Current ICES VIN = 5V Condition IC = 20A, TJ = 25C IC = 20A, TJ = 25C Min. Typ. 0.35 0.16 0.88 0.35 0.13 Max. 2.3 2.5 250 Unit V V us us us us us A
VPN = 300V, VCC = VBS = 15V IC = 20A, TJ = 25C VIN = 5V 0V, Inductive Load (High, Low-side) (Note 4) VCE = VCES, TJ = 25C
Note: 4. tON and tOFF include the propagation delay time of the internal drive IC. tC(ON) and tC(OFF) are the switching time of IGBT itself under the given gate driving condition internally. For the detailed information, please see Fig. 4.
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
t rr VCE
1 0 0 % IC
IC
IC
VCE
V IN
V IN (O N )
V IN
t
C (O N )
t ON
t OFF
V IN(OFF)
tC(OFF)
(a) Turn-on
(b) Turn-off
Fig. 4. Switching Time Definition
VCE : 100V/div. IC : 10A/div. IC : 10A/div.
VCE : 100V/div.
time : 0.1us/div.
time : 0.1us/div.
(a) Turn-on (a) turn-on
(b) Turn-off (b) turn-off
Fig. 5. Experimental Results of Switching Waveforms Test Condition: Vdc=300V, Vcc=15V, L=500uH (Inductive Load), TJ=25C
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
Electrical Characteristics Control Part
(TJ = 25C, Unless Otherwise Specified)
Item Symbol Quiescent VCC Supply Cur- IQCCL VCC = 15V rent IN(UL, VL, WL) = 5V IQCCH VCC = 15V IN(UH, VH, WH) = 5V Quiescent VBS Supply Current Fault Output Voltage Short-Circuit Trip Level Sensing Voltage of IGBT Current Supply Circuit UnderVoltage Protection IQBS VFOH VFOL VSC(ref) VSEN UVCCD UVCCR UVBSD UVBSR Fault Output Pulse Width ON Threshold Voltage OFF Threshold Voltage ON Threshold Voltage OFF Threshold Voltage Resistance of Thermistor tFOD VIN(ON) VIN(OFF) VIN(ON) VIN(OFF) RTH Low-Side VBS = 15V IN(UH, VH, WH) = 5V
Condition VCC(L) - COM(L) VCC(UH), VCC(VH), VCC(WH) COM(H) VB(U) - VS(U), VB(V) -VS(V), VB(W) - VS(W)
Min. 4.5 0.45 0.45 11.5 12 7.3 8.6 1.4
Typ. Max. Unit 26 mA 130 420 1.1 uA uA V V V V V V V V ms V V V V k k
VSC = 0V, VFO Circuit: 4.7k to 5V Pull-up VSC = 1V, VFO Circuit: 4.7k to 5V Pull-up VCC = 15V (Note 5) RSC = 56 , RSU = RSV = RSW = 0 and IC = 30A (Note Fig. 7) Detection Level Reset Level Detection Level Reset Level CFOD = 33nF (Note 6) High-Side Applied between IN(UH), IN(VH), IN(WH) - COM(H) Applied between IN(UL), IN(VL), IN(WL) - COM(L)
0.51 0.56 0.51 0.56 12 12.5 9.0 10.3 1.8 50 3.4 12.5 13 10.8 12 2.0 0.8 0.8 -
3.0 3.0 -
@ TTH = 25C (Note Fig. 6) (Note 7) @ TTH = 100C (Note Fig. 6) (Note 7)
Note: 5. Short-circuit current protection is functioning only at the low-sides. It would be recommended that the value of the external sensing resistor (RSC) should be selected around 56 in order to make the SC trip-level of about 30A at the shunt resistors (RSU,RSV,RSW) of 0 . For the detailed information about the relationship between the external sensing resistor (RSC) and the shunt resistors (RSU,RSV,RSW), please see Fig. 7. 6. The fault-out pulse width tFOD depends on the capacitance value of CFOD according to the following approximate equation : CFOD = 18.3 x 10-6 x tFOD[F] 7. TTH is the temperature of thermistor itself. To know case temperature (TC), please make the experiment considering your application.
Recommended Operating Conditions
Item Supply Voltage Control Supply Voltage High-side Bias Voltage Blanking Time for Preventing Arm-short PWM Input Signal Input ON Threshold Voltage Input OFF Threshold Voltage Symbol VPN VCC VBS tdead fPWM VIN(ON) VIN(OFF) Condition Applied between P - NU, NV, NW Applied between VCC(UH), VCC(VH), VCC(WH) COM(H), VCC(L) - COM(L) Applied between VB(U) - VS(U), VB(V) - VS(V), VB(W) - VS(W) For Each Input Signal TC 100C, TJ 125C Applied between IN(UH), IN(VH), IN(WH) COM(H), IN(UL), IN(VL), IN(WL) - COM(L) Applied between IN(UH), IN(VH), IN(WH) COM(H), IN(UL), IN(VL), IN(WL) - COM(L) Values Min. 13.5 13.5 3 Typ. 300 15 15 5 0 ~ 0.65 4 ~ 5.5 Max. 400 16.5 16.5 Unit V V V us kHz V V
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
R-T Curve
70 60 50
Resistance [ ]
40 30 20 10 0 20
30
40
50
60
70
80
90
100
110
120
130
Temperature TTH []
Fig. 6. R-T Curve of The Built-in Thermistor
120
100
80
(1) (2)
RSC []
60
40
20
0 0.00
0.01
0.02
0.03
0.04
0.05
0.06
0.07
RSU,RSV,RSW []
Fig. 7. RSC Variation by change of Shunt Resistors (RSU, RSV, RSW) for Short-Circuit Protection (1) @ around 100% Rated Current Trip (IC *=* 20A) (2) @ around 150% Rated Current Trip (IC *=* 30A)
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
Mechanical Characteristics and Ratings
Item Mounting Torque Ceramic Flatness Weight Mounting Screw: M4 (Note 8 and 9) Condition Recommended 10Kg*cm Recommended 0.98N*m Note Fig.8 Limits Min. 8 0.78 0 Typ. 10 0.98 35 Max. 12 1.17 +120 Unit Kg*cm N*m um g
(+)
(+) (+)
Datum Line
Fig. 8. Flatness Measurement Position of The Ceramic Substrate
Note: 8. Do not make over torque or mounting screws. Much mounting torque may cause ceramic cracks and bolts and Al heat-fin destruction. 9. Avoid one side tightening stress. Fig.9 shows the recommended torque order for mounting screws. Uneven mounting can cause the SPM ceramic substrate to be damaged.
2
1
Fig. 9. Mounting Screws Torque Order
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
Time Charts of SPMs Protective Function
Input Signal Internal IGBT Gate-Emitter Voltage Control Supply Voltage UV detect P1 Output Current Fault Output Signal
P1 : Normal operation - IGBT ON and conducting current P2 : Under-Voltage detection P3 : IGBT gate interrupt P4 : Fault signal generation P5 : Under-Voltage reset P6 : Normal operation - IGBT ON and conducting current
P3 P5 P2 P6 UV reset
P4
Fig. 10. Under-Voltage Protection (Low-side)
Input Signal
P3 P5 VBS UV detect P1 Output Current P2 P6 UV reset
Fault Output Signal
P4
P1 : Normal operation - IGBT ON and conducting current P2 : Under-Voltage detection P3 : IGBT gate interrupt P4 : No fault signal P5 : Under-Voltage reset P6 : Normal operation - IGBT ON and conducting current
Fig. 11. Under-Voltage Protection (High-side)
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
P5 Input Signal Internal IGBT Gate-Em itter Voltage P6
SC Detection
P1 P4 Output Current P7
P2 Sensing Voltage
RC Filter Delay SC Reference Voltage (0.5V)
Fault Output Signal
P3
P8
P1 : Normal operation - IGBT ON and conducting current P2 : Short-Circuit current detection P3 : IGBT gate interrupt / Fault signal generation P4 : IGBT is slowly turned off P5 : IGBT OFF signal P6 : IGBT ON signal - but IGBT cannot be turned on during the fault Output activation P7 : IGBT OFF state P8 : Fault Output reset and normal operation start
Fig. 12. Short-Circuit Current Protection (Low-side Operation only)
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
5V-Line
SPM
RPF 4.7k 100 100 100 1nF CPF 1nF C PL 0.47nF CPH 1.2nF CO M RPL 2k RPH 4.7k IN (UH) , IN (VH) , IN(WH) IN (UL) , IN (VL) , IN (WL) VFO
CPU
Note: 1) It would be recommended that by-pass capacitors for the gating input signals, IN(UL), IN(VL), IN(WL), IN(UH), IN(VH) and IN(WH) should be placed on the SPM pins and on the both sides of CPU and SPM for the fault output signal, VFO, as close as possible. 2) The logic input is compatible with standard CMOS or LSTTL outputs. 3) RPLCPL/RPHCPH/RPFCPF coupling at each SPM input is recommended in order to prevent input/output signals' oscillation and it should be as close as possible to each of SPM pins.
Fig. 13. Recommended CPU I/O Interface Circuit
These Values depend on PW M C ontrol Algorithm
15V-Line
One-Leg Diagram of SPM
20
DBS
Vcc VB HO
P
47uF
0.1uF
IN
COM VS
Inverter Output
Vcc
470uF
0.1uF
IN COM
OUT
N
Note: It would be recommended that the bootstrap diode, DBS, has soft and fast recovery characteristics.
Fig. 14. Recommended Bootstrap Operation Circuit and Parameters
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
15V line
5V line R BS DBS
(22) V B(W) (21) V CC(W H) P (32)
VB VCC C OM IN O UT VS
W (31)
RS G ating W H
R PH
C BS
C B SC
(20) IN (W H) (23) V S(W)
CPH R BS DBS
(18) V B(V) (17) V CC(VH)
VB VCC C OM IN O UT VS
V (30)
G ating VH
RS
R PH
(16) C OM (H)
CBS
CPH
CBSC
(15) IN (VH) (19) V S(V)
M
C D CS Vdc
C P U
R BS
DBS
(13) V B(U) (12) V CC(UH)
VB VCC C OM IN VS
U (29)
RS G ating U H
RPH C BS C PH 5V line RF RPL RPL R PL RPF C SC C FO D R C SC R SC C B SC
(11) IN (UH) (14) V S(U)
O UT
(10) R SC (9) C SC (8) C FOD (7) V FO (6) C OM (L)
C (SC ) C (FO D) VFO
O UT(W L)
N W (28)
RS Fault RS RS RS
R SW
G ating W H G ating VH G ating U H
(5) IN (W L) (4) IN (VL) (3) IN (UL) (2) C OM (L)
IN (WL) O UT(VL) IN (VL) IN (UL) C OM(L) VCC O UT(UL)
N U (26) V TH (24) THER M ISTOR R TH (25) N V (27)
R SV
C B PF
CPL CPL
C PL
CPF
(1) V CC(L)
RSU
5V line
CSP15
CSPC15
R TH
C S PC 05
Tem p. M onitoring W -Phase C urrent V-Phase Current U -Phase C urrent
C FW C FV C FU
C S P0 5
R FW R FV R FU
Note: 1) RPLCPL/RPHCPH /RPFCPF coupling at each SPM input is recommended in order to prevent input signals' oscillation and it should be as close as possible to each SPM input pin. 2) By virtue of integrating an application specific type HVIC inside the SPM, direct coupling to CPU terminals without any opto-coupler or transformer isolation is possible. 3) VFO output is open collector type. This signal line should be pulled up to the positive side of the 5V power supply with approximately 4.7k resistance. Please refer to Fig. 15. 4) CSP15 of around 7 times larger than bootstrap capacitor CBS is recommended. 5) VFO output pulse width should be determined by connecting an external capacitor(CFOD) between CFOD(pin8) and COM(L)(pin2). (Example : if CFOD = 33 nF, then tFO = 1.8 ms (typ.)) Please refer to the note 6 for calculation method. 6) Each input signal line should be pulled up to the 5V power supply with approximately 4.7k (at high side input) or 2k (at low side input) resistance (other RC coupling circuits at each input may be needed depending on the PWM control scheme used and on the wiring impedance of the system's printed circuit board). Approximately a 0.22~2nF by-pass capacitor should be used across each power supply connection terminals. 7) To prevent errors of the protection function, the wiring around RSC, RF and CSC should be as short as possible. 8) In the short-circuit protection circuit, please select the RFCSC time constant in the range 3~4 s. 9) To enhance the noise immunity, CSC pin should be connected to the external circuit through a series resistor, RCSC, which is approximately 390. RSCS should be connected to CSC pin as close as possible. 10)Each capacitor should be mounted as close to the pins of the SPM as possible. 11)To prevent surge destruction, the wiring between the smoothing capacitor and the P&N pins should be as short as possible. The use of a high frequency noninductive capacitor of around 0.1~0.22 uF between the P&N pins is recommended. 12)Relays are used at almost every systems of electrical equipments of home appliances. In these cases, there should be sufficient distance between the CPU and the relays. It is recommended that the distance be 5cm at least.
Fig. 15. Typical Application Circuit
(c)2003 Fairchild Semiconductor Corporation
Rev. E, August 2003
FSAM20SM60A
Detailed Package Outline Drawings
SPM32-AA
28x2.00 0.30=(56.0) (2.00) 2.00 0.30 MAX1.05 0.60 0.10 0.40 MAX1.00 0.60 0.10 0.40
28.0 0.30
#23 #1
O4.30
31.0 0.50
(17.00)
13.6 0.30
(3.30)
#32
19.860.30 (46.60) 53.0 0.30 60.0 0.50
#24
7.20 0.5 12.30 0.5
3x7.62 0.30=(22.86) 11.0 0.30 3x4.0 0.30=(12.0 ) 2.00 0.30
(10.14)
MAX8.20
MAX1.00
0.80
0.80 1.300.10 MAX2.50
0.40 0.600.10 MAX1.60
1.300.10 MAX3.20
(3.50)
(3.70)
Dimensions in Millimeters
(c)2003 Fairchild Semiconductor Corporation Rev. E, August 2003
36.05 0.50
(34.80)
0.70 -0.05
) (3 ~5
+0.10
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM FACT Quiet SeriesTM ActiveArrayTM FAST BottomlessTM FASTrTM CoolFETTM FRFETTM CROSSVOLTTM GlobalOptoisolatorTM DOMETM GTOTM EcoSPARKTM HiSeCTM E2CMOSTM I2CTM TM EnSigna ImpliedDisconnectTM FACTTM ISOPLANARTM Across the board. Around the world.TM The Power FranchiseTM Programmable Active DroopTM
DISCLAIMER
LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC OPTOPLANARTM PACMANTM POPTM
Power247TM PowerTrench QFET QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SILENT SWITCHER SMART STARTTM SPMTM StealthTM SuperSOTTM-3
SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic TINYOPTOTM TruTranslationTM UHCTM UltraFET VCXTM
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. I5


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